Jason Cong received his B.S. degree in computer science from Peking University in 1985, his M.S. and Ph. D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1987 and 1990, respectively. Currently, he is the Volgenau Chair for Engineering Excellence in the UCLA Computer Science Department (with joint appointment in the Department of Electrical and Computer Engineering), the Director of Center for Domain-Specific Computing (funded by NSF Expeditions in Computing Award), and the director of VLSI Architecture, Synthesis, and Technology (VAST) Laboratory. He served as the chair of the UCLA Computer Science Department from 2005 to 2008. He is a member of the National Academy of Engineering, and a fellow of IEEE, ACM, and the National Academy of Inventors.
Dr. Cong’s research interests include electronic design automation, customized computing for machine learning and big-data applications, quantum computing, and highly scalable algorithms. He has published over 500 research papers in these areas, including 18 Best Paper Awards (IEEE T-CAD 1995 and 2019, IPSD’05, HPCA'08, SASP'09, FCCM'11, FPGA’13, ISSS+CODES’13, ACM TODAES 2005, 2012, 2013 and 2023, MEMSYS'17, ISLPED'18, ICCAD'19, FPGA 2019, 2021, and 2022). He also received four 10-Year Retrospective Most Influential Paper Award at ICCAD'14, ASPDAC 2015, 2017, and 2023, respectively. His work on FPGA technology mapping (FlowMap) received the 2011 ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation “for pioneering work on technology mapping for FPGA that has made significant impact to the FPGA research community and industry”, and was the first inducted to the FPGA and Reconfigurable Computing Hall of Fame by ACM TCFPGA in 2017. As of 2023, he has a total of four papers in the FPGA and Reconfigurable Computing Hall of Fame, the highest number among all researchers. He was elected to an IEEE Fellow in 2000 for "for seminal contributions in computer-aided design of integrated circuits, especially in physical design automation, interconnect optimization, and synthesis of FPGAs", and ACM Fellow in 2008 "for contributions to electronic design automation". He received the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award "For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation" and the 2016 IEEE Computer Society Technical Achievement Award “For setting the algorithmic foundations for high-level synthesis of field programmable gate arrays”.
Dr. Cong was elected as a member of the National Academy of Engineering in 2017 “for pioneering contributions to application-specific programmable logic via innovations in field programmable gate array (FPGA) synthesis”, and a Fellow of the National Academy of Inventors in 2020. He received the University Research Award from the Semiconductor Industry Association (SIA) and the Semiconductor Research Corporation (SRC) for "research efforts to advance US semiconductor technology" in 2019. He received the IEEE Robert N. Noyce Medal for fundamental contributions to electronic design automation and FPGA design methods in 2022. He received the EDAA (European Design Automation Association) Achievement Award and Global Industry Leader Award from ChipEx'2023, both in 2023.

Ioannis Savidis (S’03-M’13-SM’18) received the B.S.E. degree in electrical and computer engineering and biomedical engineering from Duke University, Durham, NC, USA, in 2005, and the M.Sc. and Ph.D. degrees in electrical and computer engineering from the University of Rochester, Rochester, NY, USA, in 2007 and 2013, respectively. He joined the Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA, in 2013, where he is currently an Associate Professor and directs the Integrated Circuits and Electronics (ICE) Design and Analysis Laboratory. He has authored or coauthored over 125 technical papers published in peer-reviewed journals and conferences, including a book entitled Three-Dimensional Integrated Circuit Design (Morgan Kaufmann, 2nd Edition, 2017), and holds 14 issued and five pending patents. He has presented several invited talks and tutorials and has served as a panelist for the topic of hardware security at multiple conferences and workshops. His current research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation, side-channel analysis and monitoring, and Trojan detection and mitigation, ML/AI algorithms for prediction and optimization of digital and analog circuits, ML/AI for timing characterization, and electro-thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.
Dr. Savidis is a senior member of the Institute of Electrical and Electronic Engineers, and a member of the Association of Computing Machinery, the IEEE Circuits and Systems Society, the IEEE Communications Society, and the IEEE Electron Devices Society. He is a recipient of the 2021 Best Paper Award from the Microelectronics Journal and was nominated for the Best Paper from IEEE International Symposium on Circuits and Systems (ISCAS). He was a recipient of the 2018 National Science Foundation Early Faculty (CAREER) Award and the 2019 Department of Defense DURIP Award. He has and continues to serve on the organizing committees for the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), the ACM Great Lakes Symposium on VLSI (GLSVLSI), and the IEEE International Symposium on Circuits and Systems (ISCAS) in various roles, including the General Chair, the Program Chair, the Finance Chair, and the Registration Chair. He is on the technical program committees of international conferences, including HOST, DAC, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), ISQED, ICCD, ISCAS, and GLSVLSI. He serves for the VLSI Systems and Applications Technical Committee (VSATC) of the IEEE Circuits and Systems Society. He also serves for the editorial boards of IEEE Transactions on Very Large Scale Integration (VLSI) Systems, the Microelectronics Journal, and the ACM Transactions on Design Automation of Electronic Systems

Dr. Sung Jin Kim earned his Ph.D. in Electrical Engineering from the State University of New York at Buffalo in 2008. Following a two-year postdoctoral associate role at the Institute of Lasers, Photonics, and Biophotonics at SUNY Buffalo, he joined the University of Miami. Dr. Kim played a pivotal role in establishing the nanofabrication facility and served as its founding director. The nanofabrication facility is a part of the Biomedical Nanotechnology Institute of the University of Miami (BioNIUM), and it has been a powerhouse to foster interdisciplinary research collaboration across Engineering, Basic Science, and Medicine. Dr. Kim joined the University of Louisville (UofL) in 2023. He holds the position of Professor in the Department of Electrical and Computer Engineering and serves as the director of the Micro Nano Technology Center (MNTC). MNTC is one of the 16 NSF National Nanotechnology Coordinated Infrastructure (NNCI) that supports nanotechnology-related research in different disciplines. Dr. Kim's research is centered around nanophotonics with applications in energy and sensing. His work delves into the fundamental physics of light-nanostructure interactions and involves the development of various optoelectronic devices and biomedical applications utilizing engineered nanostructures and novel nanomaterials. His research endeavors have received support from funding agencies such as NSF, NIH, AFSOR, DoD, and NASA. Dr. Kim is affiliated with IEEE, Etta Kappa Nu, and holds the status of a senior member within SPIE (International Society for Optics and Photonics).